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Waveform editing in the browser

Inspect VCD dumps and author WaveDrom timing diagrams in RTL Studio: Surfer waveforms, WaveJSON editor, and empty-wave FAQ.

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RTL Studio lets you inspect VCD dumps after simulation and author timing diagrams with the built-in WaveDrom / WaveJSON editor — all in the same tab as your RTL.

Open the IDE: rtlstudio.dev · Product home: /home/ · Related: /guides/verilog-simulation/

Quick workflow (VCD after sim)

  1. Open RTL Studio with a testbench that calls $dumpfile("…") and $dumpvars.
  2. Run Simulate (see /guides/verilog-simulation/).
  3. When a .vcd appears in the workspace, open it in the Waveform viewer.
  4. Pan, zoom, and select signals to debug clocks, resets, and data paths.
  5. Iterate: edit RTL/TB → lint → simulate → reopen or refresh the VCD.

Quick workflow (WaveDrom editor)

  1. Open the Waveform / WaveDrom editor from the IDE activity bar (WaveJSON editor path).
  2. Edit WaveJSON (or paste a diagram) and render the preview.
  3. Embed fenced wavedrom / wavejson blocks in project README.md when documenting examples — the README pane renders the same WaveDrom bundle.
  4. Keep diagrams next to the RTL they describe so labs stay self-contained.

What you can do

  • Open simulation VCD in the Surfer-based waveform UI after a successful dump.
  • Author and preview WaveDrom timing diagrams without leaving the browser.
  • Document waves in README fences for examples and Open IP notes.
  • Stay local-first for day-to-day edit → sim → wave loops.

Empty or missing waves

  • Surfer only shows data when simulation actually produced a VCD. Missing $dumpfile / $dumpvars is the usual cause of a blank viewer.
  • Confirm the dump path matches the file you opened from the explorer.
  • If the run succeeded for $display but waves are empty, fix the TB dump first — then re-simulate.

Tips

  • Start with Quick start or Hello simulation to verify the dump → open loop.
  • Prefer a short signal list while debugging; add buses once the clock/reset story is clear.
  • For docs-only timing sketches, WaveDrom is faster than a full sim when you are explaining protocol phases.

FAQ

Why is the waveform empty after simulation?

Usually the testbench never dumped waves, the dump path does not match the file you opened, or the viewer is still loading. Confirm $dumpfile / $dumpvars, check the terminal for VCD, then open the generated .vcd.

Is WaveDrom the same as the VCD viewer?

No. VCD shows signals from a real simulation dump. WaveDrom draws diagrams from WaveJSON you author (or embed in README). Use both: sim for debug, WaveDrom for documentation.

Does opening a VCD upload my design?

Standard waveform viewing stays local-first in the browser. Cloud upload happens only for explicit save/share. See Privacy.

Free vs Pro for waveforms?

Core simulate and VCD viewing run on Free. Pro unlocks additional lectures, Open IP, and other gated features in the IDE.

Related reading