Edge, Debounce & Pulse

Edge Count Window 8-bit — L1 Upgrade — L2 Upgrade

8-bit edge counter with windowed sticky flag, load enable, and clear functionality.

Open in IDE Category Wiki · edge / FF

About this block

Simulate it in the Verilog IDE

Mediumverilogsimsyn

Edge Count Window 8-bit — L1 Upgrade — L2 Upgrade is a Verilog reference block in the Edge, Debounce & Pulse catalog. Edge detectors, debouncers, pulse stretchers, and one-shot generators. Marked Medium: more state or a wider datapath, still one workspace in the IDE.

This IP implements an 8-bit edge-counting window with a sticky flag mechanism.

It is designed for applications requiring precise edge counting and state monitoring.

The module supports loading a specific count value, asynchronous clearing of the sticky state, and synchronous reset.

Choose Open in IDE. RTL Studio loads the packaged workspace for Edge Count Window 8-bit — L1 Upgrade — L2 Upgrade.
Read the Verilog module in the editor. The catalog line for this block: 8-bit edge counter with windowed sticky flag, load enable, and clear functionality.
Run the packaged testbench with the in-browser Verilator simulator, then open the VCD in the waveform viewer.
Run Yosys in the same IDE for a generic netlist. Sky130 liberty mapping is a separate Pro library option.

RTL Studio is the Verilog simulator and IDE around this block: Slang lint, Verilator, VCD waveforms, and Yosys, in the browser. Simulation guide · Yosys guide.

Features

8-bit Counter Width: Supports edge counting up to 255.
Load Enable: Allows setting the counter to a specific initial value (window_val).
Window Enable: Activates the logic that compares the counter against the window value.
Sticky Flag: Asserts and holds high when count_out matches window_val.
Clear Sticky: Asynchronously resets the sticky flag.
Synchronous Reset: Resets both the counter and the sticky flag on the active-low reset signal (rst_n).

Ports

Port Name	Direction	Width	Description
`clk`	Input	1	Clock input
`rst_n`	Input	1	Active-low synchronous reset
`load_en`	Input	1	Load enable; loads `window_val` into counter
`clear_sticky`	Input	1	Asynchronously clears the sticky flag
`window_en`	Input	1	Enables window comparison logic
`window_val`	Input	8	Target value for comparison
`edge_in`	Input	1	Input signal to increment counter
`count_out`	Output	8	Current count value
`sticky_flag`	Output	1	Sticky flag output (latches on match)

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