RTL Studio Open IDE

Arithmetic & Math

8-Bit Incrementer

Combinational 8-bit incrementer with carry-out detection.

Open in IDE Category Wiki · arithmetic

About this block

Simulate it in the Verilog IDE

Easyverilogsimsyn

8-Bit Incrementer is a Verilog reference block in the Arithmetic & Math catalog. Adders, multipliers, dividers, ALUs, and arithmetic datapaths. Marked Easy: a small block you can read, simulate, and synthesize in one sitting.

This IP core implements a simple, purely combinational 8-bit incrementer. It accepts an 8-bit input (din), outputs the incremented value (dout), and asserts a carry-out signal (cout) when the input is the maximum value (0xFF).

This design is suitable for use in counters, address generators, or simple arithmetic logic units where low latency and no clock dependency are required.

  1. Choose Open in IDE. RTL Studio loads the packaged workspace for 8-Bit Incrementer.
  2. Read the Verilog module in the editor. The catalog line for this block: Combinational 8-bit incrementer with carry-out detection.
  3. Run the packaged testbench with the in-browser Verilator simulator, then open the VCD in the waveform viewer.
  4. Run Yosys in the same IDE for a generic netlist. Sky130 liberty mapping is a separate Pro library option.

RTL Studio is the Verilog simulator and IDE around this block: Slang lint, Verilator, VCD waveforms, and Yosys, in the browser. Simulation guide · Yosys guide.

Features

  • Combinational Logic: No clock dependency; immediate output update.
  • 8-Bit Width: Handles inputs from 0x00 to 0xFF.
  • Carry-Out: Explicitly asserts cout on overflow (0xFF -> 0x00).
  • Verified: Includes a testbench covering zero, near-overflow, and wrap-around cases.

Architecture

The module performs a direct addition of the constant 1 to the 8-bit input din. To correctly handle the carry-out for the full 8-bit range, the design uses a separate logic check to determine if the input was the maximum value (0xFF).

### Block Diagram

Ports

Port NameDirectionWidthDescription
dinInput8Input data word to be incremented.
doutOutput8Result of din + 1.
coutOutput1Carry out, asserted (1) if din was 0xFF, otherwise 0.

Verification

The provided testbench (tb/tb_incrementer_8bit.v) verifies three critical cases:

  1. Zero Increment: Input 0x00 should result in 0x01 with cout=0.
  2. Near Overflow: Input 0xFE (254) should result in 0xFF with cout=0.
  3. Wrap-Around: Input 0xFF (255) should result in 0x00 with cout=1.

### Expected Simulation Output

Upon successful simulation, the log should display:

If any test fails, the simulator will output a detailed error message indicating the expected and actual values.

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