Arithmetic & Math

Saturating Multiplier 4x4 — L2 Upgrade

4-bit by 4-bit saturating multiplier with sticky saturation flag and clear capability.

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About this block

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Saturating Multiplier 4x4 — L2 Upgrade is a Verilog reference block in the Arithmetic & Math catalog. Adders, multipliers, dividers, ALUs, and arithmetic datapaths. Marked Medium: more state or a wider datapath, still one workspace in the IDE.

This IP implements a 4-bit by 4-bit saturating multiplier with a sticky saturation flag.

It computes the unsigned product of two 4-bit operands and clamps the result to the maximum 4-bit value (15) if overflow occurs.

The sat_flag output provides a sticky indication of saturation, remaining asserted until explicitly cleared via clear_sat or reset via rst_n.

Computes the full 8-bit product of inputs a and b.
Checks if the product exceeds 15.
If saturation occurs, result is set to 15 and sat_flag is set to 1.
If no saturation occurs, result is set to the lower 4 bits of the product.
The sat_flag is sticky: once set to 1, it remains 1 until clear_sat is asserted or rst_n is de-asserted.

Choose Open in IDE. RTL Studio loads the packaged workspace for Saturating Multiplier 4x4 — L2 Upgrade.
Read the Verilog module in the editor. The catalog line for this block: 4-bit by 4-bit saturating multiplier with sticky saturation flag and clear capability.
Run the packaged testbench with the in-browser Verilator simulator, then open the VCD in the waveform viewer.
Run Yosys in the same IDE for a generic netlist. Sky130 liberty mapping is a separate Pro library option.

RTL Studio is the Verilog simulator and IDE around this block: Slang lint, Verilator, VCD waveforms, and Yosys, in the browser. Simulation guide · Yosys guide.

Ports

Port Name	Direction	Width	Description
`clk`	Input	1	Clock input
`rst_n`	Input	1	Active-low reset. Clears `result` to 0 and `sat_flag` to 0.
`clear_sat`	Input	1	Active-high clear. Resets `sat_flag` to 0. Does not affect `result`.
`en`	Input	1	Enable input. When low, `result` and `sat_flag` hold their previous values.
`a`	Input	4	Multiplicand operand (unsigned)
`b`	Input	4	Multiplier operand (unsigned)
`result`	Output	4	Saturating product result (0-15)
`sat_flag`	Output	1	Sticky saturation indicator. 1 if saturation occurred or was previously set.

Verification

The provided testbench (tb/tb_saturating_mul_4x4_sticky_sat_flag.v) verifies the following scenarios:

Test Case	Description	Expected Result
TC1	Basic multiplication (3 * 3)	result=9, sat_flag=0
TC2	Upper bound saturation (4 * 4)	result=15, sat_flag=1
TC3	Sticky flag retention	result=4, sat_flag=1 (remains 1)
TC4	Clear saturation flag	sat_flag=0
TC5	Reset clears all state	result=0, sat_flag=0
TC6	Re-saturation after clear	result=15, sat_flag=1
TC7	Hold behavior when disabled	result=15, sat_flag=1 (held)

All tests passed successfully in the simulation environment.

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