A 32-bit RV32I instruction is a packed struct of opcode + register + immediate slices. ABI names (x0/zero, x1/ra, …) live in a package.
flowchart LR inst[inst_31_0] --> op[opcode] inst --> rd[rd] inst --> f3[funct3] inst --> rs[rs1_rs2] inst --> imm[imm]
wire [6:0] opcode = inst[6:0];
wire [4:0] rd = inst[11:7];
wire [2:0] funct3 = inst[14:12];
I/S/B/U/J immediates are not a single contiguous field — sign-extend the slices the ISA names.
Wrong vs right
Wrong — treat inst[31:20] as the B-type immediate.
Right — decode by opcode, then assemble the immediate the spec draws.